The present invention relates to a numerical control apparatus comprising a control unit having a master card and a plurality of slave cards, particularly relates to a numerical control apparatus comprising a control unit where the master card can check the structure of the slave cards.
FIG. 6 is a block diagram showing the structure of a conventional numerical control apparatus (hereinafter referred to as NC apparatus). In the figure, reference numeral 1 designates a display unit; 2, an operation board for entering key data; 3, an I/O unit such as a tape reader or tape puncher; 4, a drive unit for driving a working machine 5; 5, the working machine; and 10, a control unit for controlling the entire of the NC apparatus.
Conventionally, the NC apparatus is structured as described above. The control unit 10 performs computing and storing based on machining information which is stored in a paper tape mounted on the I/O unit 3 (such as a tape reader). The control unit 10 also performs processing of image data which is displayed on the display unit 1 as well as controlling the positions and speeds of the axes of the working machine 5 via the drive unit 4. The drive unit 4 drives the working machine 5 based on the control information which is output from the control unit 10.
FIG. 7 is an external view showing the structure of the control unit of FIG. 6. Reference numeral 11 designates a case of the control unit; 12, a bus connector which is connected to, for example, a VME bus line; 13, a master card on which a microprocessor (hereinafter referred to as CPU) 16 is mounted; 14-1 to 14-n, slave cards; and 15, a mother board. The master card 13 and the plurality of slave cards 14-1 to 14-n are connected via respective bus connectors 12 to the mother board 15. Signals or power and ground lines between the cards are connected via printed circuit cards.
FIG. 8 is a pin assignment table of pin numbers and signal names of the VME bus which is one example of buses connected to the bus connectors 12. In the VME bus, three rows A, B and C have 32 pins, respectively. In total, 96 pins of signal lines are connected to the bus connectors 12.
FIG. 9 is a waveform diagram of major signals which are used when data is transferred.
By referring to FIGS. 8 and 9, the operation of the control unit shown in FIG. 7 will be described in the following. The CPU 16 mounted on the master card 13 shown in FIG. 7 transmits and receives various data to and from the slave cards 14-1 to 14-n having data storage and I/O functions via the bus connectors 12 and the common signal bus of the mother board 15 in accordance with the specified control program. FIG. 9 shows waveforms of major signals which are used when data is transferred. For example, when the master card 13 reads data from the slave cards 14-1 to 14-n, it outputs an address signal (24 bits of A.sub.23 to A.sub.0) and then outputs an address strobe (hereinafter referred to as AS) signal of "0" level. The slave cards 14-1 to 14-n output a data signal (16 bits of D.sub.15 to D.sub.0) specified by the received address signal and complete the data transfer operation.
Since the control unit of the conventional NC apparatuses is structured as described above, the types and names of the slave cards being mounted are not considered. At most, the slave cards only transmit codes representing the card names or card types in response to the address signal sent from the master card. Thus, when the number of card types is increased or when there are a plurality of same type cards, there occurs a problem that it becomes impossible to manage the structure of the cards being mounted.
In addition, to read codes which represent the card types and card names, it is necessary to provide new signal lines, which results in changing the structure of the standard bus.